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#1 2016-10-17 23:17:14

iceman
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Registered: 2013-04-25
Posts: 6,557
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HF - 13.56mHz clocks frequency etc

HF - 13.56mHz

A minor overview of field clock (FC) and its duration in the table below.
Carrier Freq is 13.56 mHz
SubCarrier Freq is 106, 212, 424, 847.5 kHz

sample

Duration of one peak is  1 / 847.5 = 1.18us
------------------------------------------------------------
FC/16  | 1.18us | 1/847.5 kHz | 13.56mHz / 16 = 847.5 kHz  |
FC/32  | 2.36us | 1/423.7 kHz | 13.56mHz / 32 = 424 kHz    |
FC/64  | 4.72us | 1/211.8 kHz | 13.56mHz / 64 = 211.8 kHz  |
FC/128 | 9.44us | 1/105.9 kHz | 13.56mHz / 128 = 105.9 kHz |
------------------------------------------------------------

--
Should add number of peaks in a FC converts into set bits in the FPGA when using modes like etc etc.
FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_MODULATE_212K
FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN

Ref:  http://www.ieice.org/proceedings/ITC-CS … _P1-17.pdf


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#2 2016-10-17 23:43:25

iceman
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Registered: 2013-04-25
Posts: 6,557
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Re: HF - 13.56mHz clocks frequency etc

Why is this interesting? If you want to fiddle with the ARM source code and write new UART/DEMOD,  for other protocols than ISO14443a, ISO14443b then this is a must.

Legic Prime,  TAG to Reader (PICC to PCD) has fc/64,  1 bitperiod duration is 100us.

To send a "1" bit:   you'll need to send 100/4.72 = 21 bits of ones to FPGA. (or 21peaks) .  1111 1111 1111 1111 1111 1
To send a "0" bit:   you'll need to send 100/4.72 = 21 bits of zeros to FPGA. 0000 0000 0000 0000 0000 0

0x15 = 010101b =
00000000000000000000 0111 1111 1111 1111 1111 1100 0000000000000000000111111111111111111111000000000000000000000111111111111111111111
->->(hex) 000007FFFFC000 

With this you will understand threads like:
http://www.proxmark.org/forum/viewtopic.php?id=2004


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